Cerebras launches the CS-4, its first multi-wafer system, though the chip inside is not new

Cerebras’ CS-4 system houses three WSE-3 Turbo wafers that together deliver 750 petaflops of sparse FP16 performance and 129.6 PB/s memory bandwidth, with sub-2 μs wafer-to-wafer latency. Power draw is roughly 120–140 kW, about half that of comparable AMD and Nvidia solutions. The wafers use the same 4-trillion-transistor 5 nm die as the previous generation, operating between 1.4 GHz and 2.8 GHz. Cerebras claims up to 30× faster inference on a 120-billion-parameter model versus unnamed GPU setups, and CEO Andrew Feldman forecasts a four-fold latency reduction by 2027 to support more complex enterprise AI workloads.