Microcode in Intel's 8087 floating-point chip: the scale instruction

The 8087 floating-point coprocessor, introduced in 1980, implemented its instructions in a 1648-entry microcode ROM, with the FSCALE instruction requiring over 140 micro-instructions and three subroutine levels to handle numerous special cases. FSCALE scales a number by a power of two using the chip’s 64-bit significand shifter, exponent converter, and adder, revealing the 8087’s internal datapath architecture and a hidden feature uncovered by reverse-engineering.